IPNet Results

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Using VHDL Code as Component-Level IP (FPGA Module) - LabVIEW 2011 FPGA Module Help Use component-level IP (CLIP) to instantiate VHDL code with a defined interface that occupies a portion of an FPGA. You can use CLIP to perform the following tasks: zone.ni.com/reference/en-XX/help/371599G-01/lvfpgaconcepts/using_component_ip/
Using the IP Integration Node (FPGA Module) - LabVIEW 2011 FPGA Module Help Double-click the node to configure it. LabVIEW displays a configuration wizard you use to complete the following tasks. zone.ni.com/reference/en-XX/help/371599G-01/lvfpgaconcepts/ipin_use/

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Title	Application Area	Part of	LabVIEW Version	Rating
Using VHDL Code as Component-Level IP (FPGA Module) - LabVIEW 2011 FPGA Module Help	3rd Party Integration		8.6-2011	5
Using the IP Integration Node (FPGA Module) - LabVIEW 2011 FPGA Module Help	3rd Party Integration		2010-11	5

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Search Syntax Summary

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()	(temperature monitoring)	Allows terms to be grouped when used with other operators. For example, searing for industrial -(temperature monitoring) will return only documents containing "industrial" but not "temperature" or "monitoring"	OR
*	monitor*	Acts as a wildcard. This example will return documents containing words "monitor", "monitoring", "monitored", etc	n/a

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